The present invention concerns a semiconductor memory device, and more particularly a redundant means and method for replacing a defective memory cell of a semiconductor memory cell with a redundant memory cell.
A semiconductor memory device comprises a plurality of memory cells arranged in rows and columns, the number of which cells depends on the memory capacity. As the number of the memory cells is increased, the probability of defective memory cells is also increased. The semiconductor memory device cannot be used even with a memory cell being defective.
Conventionally, a redundant memory cell array is arranged in the columns and rows of a normal memory cell array so as to operate a semiconductor memory device regardless of a defective memory cell, thus increasing the yield of semiconductor memory devices. Such a conventional repair method for replacing a defective memory cell array with a redundant cell array is generally achieved with a laser or electrical redundant means.
An electrical redundant means for a semiconductor memory device is disclosed in U.S. Pat. No. 41,392,211, wherein a high voltage current should be used in order to cut off a fuse, so that the size of the transistor for conducting the current must be sufficiently large. Hence, the chip size is increased, and the high voltage current causes a damage to the chip.
In order to resolve the drawbacks of the electrical redundant means, there was proposed a laser redundant means of high cost in U.S. Pat. No. 4,228,528, wherein laser is used to cut off the fuses of the rows or columns with a defective cell. In this case, there must be arranged a fuse for each of the bit lines and word lines connected with the memory cell array, so that the word line or bit line with a defective memory cell may be cut off. As, the memory capacity is increased, the interval between the fuses arranged in the word and bit lines is decreased. Consequently, the size of the laser spot for cutting off the fuse must be decreased, or otherwise the adjacent normal word or bit lines or the fuses thereof may be damaged while the cutting off the fuse of a word or bit line linked with a defective memory cell.
For example, assuming the diameter of the spot is 4-5 microns in the case of 256K DRAM, it should be 2.5-4 microns in 1M DRAM, and more reduced over 4M DRAM, so that there must be used a laser means for obtaining a smaller spot with very small tolerance. As a result the laser means is impossible to practically apply to a highly integrated memory device of megaorder.
In such a circumstance, there has been proposed a method for decoding a spare memory cell, i.e., redundant memory cell by internally addressing when a normal memory cell has a defect. Referring to FIG. 1 for showing a block diagram of a semiconductor memory device using the internal address decoding, there are arranged respectively on the left and right sides of isolation gate 4 left normal cell array 1 with left redundant cell array 3 and right normal cell array 5 with right redundant cell array 7. The memory cell groups also have respectively sense amplifiers 2 and 6. An input/output gate 8 is interposed between the right redundant memory cell array 7 and input/output lines IO and IO.
Thus, each of the normal cell arrays has a corresponding redundant cell array that is selected by a corresponding decoder 9 or 10 according to a redundant address signal RAi from a fuse box 11. In other words, if the left normal cell array 1 has a defect, the left redundant cell array 3 is used, while the right normal cell array 5 has a defect, the right redundant cell array 7. Hence, the size of a semiconductor memory chip comprising a plurality of memory cell groups is considerably increased because there must be arranged a respective redundant cell array on both sides of the isolation gate 4. This makes very difficult to highly integrate a semiconductor memory device. Moreover, if a defect occurs in the left normal cell array 1, to sense the data in the left redundant cell array 3 is carried out by transmitting read out data via left sense amplifier 2-isolation gate 4-right sense amplifier 6-input/output gate 8, while if a defect occurs in the right normal cell array 5, to sense the data in the right redundant cell array 7 is carried out by transmitting read out data via right sense amplifier 6-input/output gate 8, thereby resulting in unbalanced power consumption. This may cause instability of the whole power consumption.